A conventional delta sigma modulator comprises an operational amplifier, a voltage comparator, and a D type flip flop. The operational amplifier has a positive (non-inverted) input connected to a first reference voltage source, a negative (inverted) input connected through a first resistor to a signal input terminal, and an output to be fed back through a capacitor to the negative input. The voltage comparator has a positive input connected to the output of the operational amplifier, a negative input connected to a second reference voltage source, and an output connected to a signal output terminal and an input of the D type flip flop. The D type flip flop is applied with positive and negative power supply voltages, and supplied with a clock signal, such that an output signal is generated in accordance with an output signal supplied from the voltage comparator, and is supplied through a second resistor to the negative input of the operational amplifier.
In operation, input voltages applied to the positive and negative inputs of the operational amplifier becomes equal, because negative feedback is carried out in the operational amplifier by the capacitor. Here, when a signal voltage V.sub.1N is applied to the signal input terminal, the capacitor is charged and discharged by the sum of currents calculated by "(V.sub.1N -V.sub.R1)/R.sub.21 " and "(V.sub.D -V.sub.R1)/R.sub.22 ", where R.sub.21 and R.sub.22 are resistance values of the first and second resistors, V.sub.R1 is a voltage of the first reference voltage, and V.sub.D is an output signal voltage of the D type flip flop. An output voltage of the operational amplifier is converted to binary data by the voltage comparator, and the binary data is supplied to the D type flip flop, in which one bit data is generated in accordance with the sampling of the binary data by the clock signal, and the one bit data is one sample clock-delayed and is inverted to provide an inverted one bit data. The inverted one bit data is converted to an analog data which is fed back through the second resistor to the negative input of the operational amplifier. If it is assumed that P- and N-MOS transistors of the D type flip flop connected at drains to the output thereof have ON resistance values negligible for a resistance value of the second resistor, a voltage of the signal output terminal becomes the positive power supply voltage V.sub.DD or the negative power supply voltage V.sub.SS. If it is assumed that first reference power supply voltage V.sub.R1 is half a value obtained by subtracting V.sub.SS from V.sub.DD [V.sub.R1 =1/2(V.sub.DD -V.sub.SS)], a voltage at the negative input of the operational amplifier is also half the value obtained by subtraction, and a current flowing through the second resistor becomes the D/A converted output of one bit by the direction thereof. In accordance with the above described delta sigma modulator, a signal (quantized noise) supplied to the voltage comparator becomes a negative feedback signal at a low frequency band, and a positive feedback signal at a high frequency band.
According to the conventional delta sigma modulator, however, there is a disadvantage in that a distortion factor becomes deteriorated. The distortion factor is affected dependent on a value DF defined by the equation (1). EQU DF=.vertline.tpdr-tp-df+1/2(tr-tf).vertline. (1)
where tpdr and tpdf are propagation delay times at data rising and falling times, and tr and tf are data rising and falling times in the D type flip flop for constituting a D/A converter, as described on pages 153 to 166 of "J. Audio Eng. Soc., Vol. 34".
As apparent from the equation (1), the distortion factor can be minimized by decreasing the value DF in accordance with the setting up of the relation "tpdr=tpdf" and "tr=tf". In the conventional delta sigma modulator, however, the signal transfer paths are different between the data rising and falling times, so that the relation "tpdr=tpdf" is not met. The detail of structure, operation, disadvantage, etc. of the conventional delta sigma modulator will be explained in more detail just prior to the description of preferred embodiments according to the invention.